EMC FLEX BLOG A site dedicated to Automotive EMC Testing for Electronic Modules

An incorrect DUT grounding scheme can easily make the difference between compliance and non-compliance to CISPR 25 CEI limits. Sometimes we have to evaluate CEI from two modules, one used as DUT and the other one used as DUT's load (e.g. Module #1 is a PWM maker while Module #2 is an LEDs Lamp).

Christian Rosu, 2021-06-09

A few remarks on correct Load Simulator configuration for CISPR 25 Conducted Emissions Current test method.

First of all you have to show the LISN in your EMC Test Plan block diagrams. The way the LS is connected is not identical for each CISPR 25 test method. I will never use a Load Simulator unless is no other way around or I would want to turn it into a RF filter box. Examples of CEI good and bad setups are shown below:

CEI WRONG CONFIGURATION

CEI GOOD CONFIGURATION

To clarify how a PWM maker is connected:

From EMC compliance perspective the goal is to avoid as much as possible common line impedances:

Christian Rosu

2021-04-13

See Ground Return & Common Impedance Coupling

When two circuits share a common ground, the ground voltage of each one is affected by the ground current of the other circuit.

When two circuits share a common power supply, current drawn by one circuit affects the voltage at the other circuit.

The Load Simulator must be robust and as simple as possible to become a valid reference for DUT EMC performace evaluation. The most common mistake during LS configuration for RE, BCI, RI ALSE is related to how DUT's supply return is interconected with the rest of DUT support equipment. Incorrect grounding between DUT, Load Simulator, Support Equipment, Ground Plane, dedicated Earth Grounding Rod, and Buildin Safety Ground can end up in unwanted grounding loops or as shown below to a situation where the GND LISN Input is connected to GND LISN Output.

An ideal Load Simulator is just a pass-through enclosure with test points, control switches, no active electronics.  Most of the time the DUT is powered straight from the output of the B+ LISN  or a Pulse Generator following certain rules in terms of B+ and GND leads length. The input of the LISN for battery negative pole is always connected to ground plane. Depending on the OEM specification or international standard used, the Load Simulator is powered directly from the automotive battery or from the output of the B+ LISN. If powered from the output of the LISN, the active electronic components part of the LS can play a role in the EMC compliance of the DUT.  In automotive EMC each test bench or EMC test chamber should have dedicated Eart Grounding Rod completely separated from the Buliding Safety Ground. The incorrect grounding configuration below shows how via the test ground plane the building safety ground is in contact with the dedicated earth grounding rod. In this situation the output of the LISN is shorted to its input cancelling the purpose of the LISN.

Never connect the negative terminal from support equipment power supplies to their terminal for safety ground. 

 2020-12-14 Christian Rosu

See Differential Mode vs Common Mode Current

Diverting a return current path over a longer route can cause both radiated emissions and RF immunity issues. At frequencies above 100 kHz, the return current flows along the path of least impedance (e.g. directly under the signal or clock trace).

Splitting the analog and digital return planes, noisy digital return currents will stay out of the sensitive analog area. Runing digital signal traces across isolated analog areas can contaminate the analog area. The two planes are generally connected together at the PC board power connector.

In a scenario with a single return plane the critical part is routing the signal traces (and corresponding return currents) so they don't cross the A/D boundary. 

Stitching capacitors allow a path for return currents to get back to the source when crossing multiple planes with differing potentials (e.g. power and signal return planes). They need to be located as closely as possible to where the high frequency trace penetrates the planes. The value is not critical (1 to 10 nF), but should present a low impedance at the frequency in question (plus harmonics). 

Multiple vias will provide multiple paths back to the source. At really high frequencies (above 500 MHz into the GHz region), the power and power return planes can form a cavity resonance and causeradiated emissions. Adding a pattern of stitching capacitors can help break up this resonance. There are also experiments on the use of “lossy” bypass capacitors (high ESR) mounted around the board that serve to damp the resonances. 

Approaching frequencies above 100 MHz, the series inductance can become significant. Therefore a classic via would work better than a zero-Ohm resistor, depending on the connecting traces. 

Number of PCB Layers

From an EMC standpoint, eight, or more, layers has proven best. The problem with four or six-layer board designs is that it becomes very difficult to define a solid lowimpedance return path when running high speed signals and clock traces through multiple power/return planes. The power and signal/power return planes to be as close together as possible and sometimes this is difficult to
manufacture.

Trace Length

The general rule of thumb is that if a trace (or cable) is electrically 1/20th wavelength, or less, then it becomes a very inefficient radiating structure. As the length starts to approach a half-wavelength, then it becomes an efficient antenna.